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VisionPlus_V3.0
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VisionPlus_V...
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VisionPlusTools
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CstOMRON_Fins
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Fins
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finslib_search.cpp

finslib_search.cpp 15 KB
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  1. #include <stdio.h>
    2. 

  2. #include <string.h>
    3. 

  3. #include "fins.h"
    4. 

  4. 

  5. #define BUFLEN		1024
    6. 

  6. //PLC区域地址
    7. 

  7. static const struct fins_area_tp fins_area[] = {
    8. 

  8. 	/* plc_mode     name,  bits, length, area, low_id, high_id, low_addr, high_addr, access,                                                      force */
    9. 

  9. { FINS_MODE_CS, "CIO", 1,    1,      0x30,      0,    6143, 0x000000, 0x17FF0F,  FI_RD | FI_WR | FI_MRD | FI_FRC, false },
    10. 

  10. { FINS_MODE_CS, "CIO", 1,    1,      0x70,      0,    6143, 0x000000, 0x17FF0F,                            FI_MRD,                            true },
    11. 

  11. { FINS_MODE_CS, "CIO", 16,   2,      0xB0,      0,    6143, 0x000000, 0x17FF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    12. 

  12. { FINS_MODE_CS, "CIO", 16,   4,      0xF0,      0,    6143, 0x000000, 0x17FF00,                            FI_MRD,                            true },
    13. 

  13. { FINS_MODE_CS, "W",   1,    1,      0x31,      0,     511, 0x000000, 0x01FF0F,  FI_RD | FI_WR | FI_MRD | FI_FRC, false },
    14. 

  14. { FINS_MODE_CS, "W",   1,    1,      0x71,      0,     511, 0x000000, 0x01FF0F,                            FI_MRD,                            true },
    15. 

  15. { FINS_MODE_CS, "W",   16,   2,      0xB1,      0,     511, 0x000000, 0x01FF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    16. 

  16. { FINS_MODE_CS, "W",   16,   4,      0xF1,      0,     511, 0x000000, 0x01FF00,                            FI_MRD,                            true },
    17. 

  17. { FINS_MODE_CS, "H",   1,    1,      0x32,      0,     511, 0x000000, 0x01FF0F,  FI_RD | FI_WR | FI_MRD | FI_FRC, false },
    18. 

  18. { FINS_MODE_CS, "H",   1,    1,      0x72,      0,     511, 0x000000, 0x01FF0F,                            FI_MRD,                            true },
    19. 

  19. { FINS_MODE_CS, "H",   16,   2,      0xB2,      0,     511, 0x000000, 0x01FF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    20. 

  20. { FINS_MODE_CS, "H",   16,   4,      0xF2,      0,     511, 0x000000, 0x01FF00,                            FI_MRD,                            true },
    21. 

  21. { FINS_MODE_CS, "A",   1,    1,      0x33,      0,     959, 0x000000, 0x03BF0F,  FI_RD | FI_MRD,                            false },
    22. 

  22. { FINS_MODE_CS, "A",   1,    1,      0x33,    448,     959, 0x01C000, 0x03BF0F,          FI_WR,                                               false },
    23. 

  23. { FINS_MODE_CS, "A",   16,   2,      0xB3,      0,     959, 0x000000, 0x03BF00,  FI_RD | FI_MRD | FI_TRS,                   false },
    24. 

  24. { FINS_MODE_CS, "A",   16,   2,      0xB3,    448,     959, 0x01C000, 0x03BF00,          FI_WR | FI_FILL | FI_TRD,          false },
    25. 

  25. { FINS_MODE_CS, "TIM", 1,    1,      0x09,      0,    4095, 0x000000, 0x0FFF00,  FI_RD | FI_MRD | FI_FRC, false },
    26. 

  26. { FINS_MODE_CS, "TIM", 1,    1,      0x49,      0,    4095, 0x000000, 0x0FFF00,                            FI_MRD,                            true },
    27. 

  27. { FINS_MODE_CS, "TIM", 16,   2,      0x89,      0,    4095, 0x000000, 0x0FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    28. 

  28. { FINS_MODE_CS, "CNT", 1,    1,      0x09,      0,    4095, 0x800000, 0x8FFF00,  FI_RD | FI_MRD | FI_FRC, false },
    29. 

  29. { FINS_MODE_CS, "CNT", 1,    1,      0x49,      0,    4095, 0x800000, 0x8FFF00,                            FI_MRD,                            true },
    30. 

  30. { FINS_MODE_CS, "CNT", 16,   2,      0x89,      0,    4095, 0x800000, 0x8FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    31. 

  31. { FINS_MODE_CS, "DM",  1,    1,      0x02,      0,   32767, 0x000000, 0x7FFF0F,  FI_RD | FI_WR | FI_MRD,                            false },
    32. 

  32. { FINS_MODE_CS, "DM",  16,   2,      0x82,      0,   32767, 0x000000, 0x7FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    33. 

  33. { FINS_MODE_CS, "E0_", 1,    1,      0x20,      0,   32767, 0x000000, 0x7FFF0F,  FI_RD | FI_WR | FI_MRD,                            false },
    34. 

  34. { FINS_MODE_CS, "E1_", 1,    1,      0x21,      0,   32767, 0x000000, 0x7FFF0F,  FI_RD | FI_WR | FI_MRD,                            false },
    35. 

  35. { FINS_MODE_CS, "E2_", 1,    1,      0x22,      0,   32767, 0x000000, 0x7FFF0F,  FI_RD | FI_WR | FI_MRD,                            false },
    36. 

  36. { FINS_MODE_CS, "E3_", 1,    1,      0x23,      0,   32767, 0x000000, 0x7FFF0F,  FI_RD | FI_WR | FI_MRD,                            false },
    37. 

  37. { FINS_MODE_CS, "E4_", 1,    1,      0x24,      0,   32767, 0x000000, 0x7FFF0F,  FI_RD | FI_WR | FI_MRD,                            false },
    38. 

  38. { FINS_MODE_CS, "E5_", 1,    1,      0x25,      0,   32767, 0x000000, 0x7FFF0F,  FI_RD | FI_WR | FI_MRD,                            false },
    39. 

  39. { FINS_MODE_CS, "E6_", 1,    1,      0x26,      0,   32767, 0x000000, 0x7FFF0F,  FI_RD | FI_WR | FI_MRD,                            false },
    40. 

  40. { FINS_MODE_CS, "E7_", 1,    1,      0x27,      0,   32767, 0x000000, 0x7FFF0F,  FI_RD | FI_WR | FI_MRD,                            false },
    41. 

  41. { FINS_MODE_CS, "E8_", 1,    1,      0x28,      0,   32767, 0x000000, 0x7FFF0F,  FI_RD | FI_WR | FI_MRD,                            false },
    42. 

  42. { FINS_MODE_CS, "E9_", 1,    1,      0x29,      0,   32767, 0x000000, 0x7FFF0F,  FI_RD | FI_WR | FI_MRD,                            false },
    43. 

  43. { FINS_MODE_CS, "EA_", 1,    1,      0x2A,      0,   32767, 0x000000, 0x7FFF0F,  FI_RD | FI_WR | FI_MRD,                            false },
    44. 

  44. { FINS_MODE_CS, "EB_", 1,    1,      0x2B,      0,   32767, 0x000000, 0x7FFF0F,  FI_RD | FI_WR | FI_MRD,                            false },
    45. 

  45. { FINS_MODE_CS, "EC_", 1,    1,      0x2C,      0,   32767, 0x000000, 0x7FFF0F,  FI_RD | FI_WR | FI_MRD,                            false },
    46. 

  46. { FINS_MODE_CS, "E0_", 16,   2,      0xA0,      0,   32767, 0x000000, 0x7FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    47. 

  47. { FINS_MODE_CS, "E1_", 16,   2,      0xA1,      0,   32767, 0x000000, 0x7FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    48. 

  48. { FINS_MODE_CS, "E2_", 16,   2,      0xA2,      0,   32767, 0x000000, 0x7FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    49. 

  49. { FINS_MODE_CS, "E3_", 16,   2,      0xA3,      0,   32767, 0x000000, 0x7FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    50. 

  50. { FINS_MODE_CS, "E4_", 16,   2,      0xA4,      0,   32767, 0x000000, 0x7FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    51. 

  51. { FINS_MODE_CS, "E5_", 16,   2,      0xA5,      0,   32767, 0x000000, 0x7FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    52. 

  52. { FINS_MODE_CS, "E6_", 16,   2,      0xA6,      0,   32767, 0x000000, 0x7FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    53. 

  53. { FINS_MODE_CS, "E7_", 16,   2,      0xA7,      0,   32767, 0x000000, 0x7FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    54. 

  54. { FINS_MODE_CS, "E8_", 16,   2,      0xA8,      0,   32767, 0x000000, 0x7FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    55. 

  55. { FINS_MODE_CS, "E9_", 16,   2,      0xA9,      0,   32767, 0x000000, 0x7FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    56. 

  56. { FINS_MODE_CS, "EA_", 16,   2,      0xAA,      0,   32767, 0x000000, 0x7FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    57. 

  57. { FINS_MODE_CS, "EB_", 16,   2,      0xAB,      0,   32767, 0x000000, 0x7FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    58. 

  58. { FINS_MODE_CS, "EC_", 16,   2,      0xAC,      0,   32767, 0x000000, 0x7FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    59. 

  59. { FINS_MODE_CS, "E",   16,   2,      0x98,      0,   32767, 0x000000, 0x7FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    60. 

  60. { FINS_MODE_CS, "EM",  16,   2,      0xBC,      0,       0, 0x0F0000, 0x0F0000,  FI_RD | FI_MRD,                            false },
    61. 

  61. { FINS_MODE_CS, "TK",  1,    1,      0x06,      0,      31, 0x000000, 0x001F00,  FI_RD | FI_MRD,                            false },
    62. 

  62. { FINS_MODE_CS, "TKS", 1,    1,      0x46,      0,      31, 0x000000, 0x001F00,  FI_RD | FI_MRD,                            false },
    63. 

  63. { FINS_MODE_CS, "IR",  16,   4,      0xDC,      0,      15, 0x010000, 0x010F00,  FI_RD | FI_WR | FI_MRD,                            false },
    64. 

  64. { FINS_MODE_CS, "DR",  16,   2,      0xBC,      0,      15, 0x020000, 0x020F00,  FI_RD | FI_WR | FI_MRD,                            false },
    65. 

  65. { FINS_MODE_CS, "C1M", 1,    1,      0x07,      0,       0, 0x000000, 0x000000,  FI_RD | FI_MRD,                            false },
    66. 

  66. { FINS_MODE_CS, "C1S", 1,    1,      0x07,      0,       0, 0x000100, 0x000100,  FI_RD | FI_MRD,                            false },
    67. 

  67. { FINS_MODE_CS, "C02", 1,    1,      0x07,      0,       0, 0x000200, 0x000200,  FI_RD | FI_MRD,                            false },
    68. 

  68. { FINS_MODE_CS, "C01", 1,    1,      0x07,      0,       0, 0x000300, 0x000300,  FI_RD | FI_MRD,                            false },
    69. 

  69. { FINS_MODE_CS, "C22", 1,    1,      0x07,      0,       0, 0x000400, 0x000400,  FI_RD | FI_MRD,                            false },
    70. 

  70. { FINS_MODE_CS, "CER", 1,    1,      0x07,      0,       0, 0x100000, 0x100000,  FI_RD | FI_MRD,                            false },
    71. 

  71. { FINS_MODE_CS, "CCY", 1,    1,      0x07,      0,       0, 0x100100, 0x100100,  FI_RD | FI_MRD,                            false },
    72. 

  72. { FINS_MODE_CS, "CGT", 1,    1,      0x07,      0,       0, 0x100200, 0x100200,  FI_RD | FI_MRD,                            false },
    73. 

  73. { FINS_MODE_CS, "CEQ", 1,    1,      0x07,      0,       0, 0x100300, 0x100300,  FI_RD | FI_MRD,                            false },
    74. 

  74. { FINS_MODE_CS, "CLT", 1,    1,      0x07,      0,       0, 0x100400, 0x100400,  FI_RD | FI_MRD,                            false },
    75. 

  75. { FINS_MODE_CS, "NEG", 1,    1,      0x07,      0,       0, 0x100500, 0x100500,  FI_RD | FI_MRD,                            false },
    76. 

  76. { FINS_MODE_CS, "COF", 1,    1,      0x07,      0,       0, 0x100600, 0x100600,  FI_RD | FI_MRD,                            false },
    77. 

  77. { FINS_MODE_CS, "CUF", 1,    1,      0x07,      0,       0, 0x100700, 0x100700,  FI_RD | FI_MRD,                            false },
    78. 

  78. { FINS_MODE_CS, "CGE", 1,    1,      0x07,      0,       0, 0x100800, 0x100800,  FI_RD | FI_MRD,                            false },
    79. 

  79. { FINS_MODE_CS, "CNE", 1,    1,      0x07,      0,       0, 0x100900, 0x100900,  FI_RD | FI_MRD,                            false },
    80. 

  80. { FINS_MODE_CS, "CLE", 1,    1,      0x07,      0,       0, 0x100A00, 0x100A00,  FI_RD | FI_MRD,                            false },
    81. 

  81. { FINS_MODE_CS, "OFF", 1,    1,      0x07,      0,       0, 0x100E00, 0x100E00,  FI_RD | FI_MRD,                            false },
    82. 

  82. { FINS_MODE_CS, "ON",  1,    1,      0x07,      0,       0, 0x100F00, 0x100F00,  FI_RD | FI_MRD,                            false },
    83. 

  83. 

  84. { FINS_MODE_CV, "CIO", 1,    1,      0x00,      0,    2555, 0x000000, 0x09FB0F,  FI_RD | FI_MRD | FI_FRC, false },
    85. 

  85. { FINS_MODE_CV, "CIO", 1,    1,      0x40,      0,    2555, 0x000000, 0x09FB0F,                            FI_MRD,                            true },
    86. 

  86. { FINS_MODE_CV, "CIO", 16,   2,      0x80,      0,    2555, 0x000000, 0x09FB00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    87. 

  87. { FINS_MODE_CV, "CIO", 16,   2,      0xC0,      0,    2555, 0x000000, 0x09FB00,                            FI_MRD,                            true },
    88. 

  88. { FINS_MODE_CV, "A",   1,    1,      0x00,      0,     959, 0x0B0000, 0x0EBF0F,  FI_RD | FI_MRD,                            false },
    89. 

  89. { FINS_MODE_CV, "A",   1,    1,      0x00,    448,     959, 0x0CC000, 0x0EBF0F,  0,                                                           false },
    90. 

  90. { FINS_MODE_CV, "A",   16,   2,      0x80,      0,     959, 0x0B0000, 0x0EBF00,  FI_RD | FI_MRD | FI_TRS,                   false },
    91. 

  91. { FINS_MODE_CV, "A",   16,   2,      0x80,    448,     959, 0x0CC000, 0x0EBF00,          FI_WR | FI_FILL | FI_TRD,          false },
    92. 

  92. { FINS_MODE_CV, "TIM", 1,    1,      0x01,      0,    2047, 0x000000, 0x07FF00,  FI_RD | FI_MRD | FI_FRC, false },
    93. 

  93. { FINS_MODE_CV, "TIM", 1,    1,      0x41,      0,    2047, 0x000000, 0x07FF00,                            FI_MRD,                            true },
    94. 

  94. { FINS_MODE_CV, "TIM", 16,   2,      0x81,      0,    2047, 0x000000, 0x07FF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    95. 

  95. { FINS_MODE_CV, "CNT", 1,    1,      0x01,      0,    2047, 0x080000, 0x0FFF00,  FI_RD | FI_MRD | FI_FRC, false },
    96. 

  96. { FINS_MODE_CV, "CNT", 1,    1,      0x41,      0,    2047, 0x080000, 0x0FFF00,                            FI_MRD,                            true },
    97. 

  97. { FINS_MODE_CV, "CNT", 16,   2,      0x81,      0,    2047, 0x080000, 0x0FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    98. 

  98. { FINS_MODE_CV, "DM",  16,   2,      0x82,      0,   32767, 0x000000, 0x7FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    99. 

  99. { FINS_MODE_CV, "E0_", 16,   2,      0x90,      0,   32767, 0x000000, 0x7FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    100. 

  100. { FINS_MODE_CV, "E1_", 16,   2,      0x91,      0,   32767, 0x000000, 0x7FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    101. 

  101. { FINS_MODE_CV, "E2_", 16,   2,      0x92,      0,   32767, 0x000000, 0x7FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    102. 

  102. { FINS_MODE_CV, "E3_", 16,   2,      0x93,      0,   32767, 0x000000, 0x7FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    103. 

  103. { FINS_MODE_CV, "E4_", 16,   2,      0x94,      0,   32767, 0x000000, 0x7FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    104. 

  104. { FINS_MODE_CV, "E5_", 16,   2,      0x95,      0,   32767, 0x000000, 0x7FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    105. 

  105. { FINS_MODE_CV, "E6_", 16,   2,      0x96,      0,   32767, 0x000000, 0x7FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    106. 

  106. { FINS_MODE_CV, "E7_", 16,   2,      0x97,      0,   32767, 0x000000, 0x7FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    107. 

  107. { FINS_MODE_CV, "E",   16,   2,      0x98,      0,   32767, 0x000000, 0x7FFF00,  FI_RD | FI_WR | FI_FILL | FI_MRD | FI_TRS | FI_TRD,          false },
    108. 

  108. { FINS_MODE_CV, "EM",  16,   2,      0x9C,      0,       0, 0x000600, 0x000600,  FI_RD | FI_MRD,                            false },
    109. 

  109. { FINS_MODE_CV, "DR",  16,   2,      0x9C,      0,       2, 0x000300, 0x000500,  FI_RD | FI_WR | FI_MRD,                            false },
    110. 

  110. 

  111. { FINS_MODE_UNKNOWN, NULL, 0, 0,     0x00,      0,       0, 0x000000, 0x000000,  0,                                                           false }
    112. 

  112. };
    113. 

  113. 

  114. /*
    115. 

  115. * const struct fins_area_tp *XX_finslib_search_area( struct fins_sys_tp *sys, const char *start, int bits, uint32_t accs, bool force );
    116. 

  116. *
    117. 

  117. * 返回一个指向与参数匹配的区域的指针，或者如果没有找到这样的区域，则返回NULL。
    118. 

  118. */
    119. 

  119. 

  120. const struct fins_area_tp *XX_finslib_search_area(struct fins_sys_tp *sys, const struct fins_address_tp *address, int bits, uint32_t accs, bool force) {
    121. 

  121. 

  122. 	int a;
    123. 

  123. 

  124. 	a = 0;
    125. 

  125. 

  126. 	while (fins_area[a].plc_mode != FINS_MODE_UNKNOWN) {
    127. 

  127. 

  128. 		if (fins_area[a].plc_mode != sys->plc_mode) { a++; continue; }
    129. 

  129. 		if (fins_area[a].bits != bits) { a++; continue; }
    130. 

  130. 		if ((fins_area[a].access | accs) == 0x00000000) { a++; continue; }
    131. 

  131. 		if (fins_area[a].force != force) { a++; continue; }
    132. 

  132. 		if (fins_area[a].low_id             >  address->main_address) { a++; continue; }
    133. 

  133. 		if (fins_area[a].high_id            <  address->main_address) { a++; continue; }
    134. 

  134. 		if (strcmp(fins_area[a].name, address->name)) { a++; continue; }
    135. 

  135. 

  136. 		break;
    137. 

  137. 	}
    138. 

  138. 

  139. 	if (fins_area[a].plc_mode == FINS_MODE_UNKNOWN) return NULL;
    140. 

  140. 

  141. 	return &fins_area[a];
    142. 

  142. 

  143. }  /* XX_finslib_search_area */
    144. 

  144.